10 articles
Articles tagged with "Off Heap"
Explore our collection of 10 articles about off heap.
The Disruptor Pattern: Multi-Stage Event Processing Pipelines
Implement LMAX Disruptor-style event processing with sequence barriers, multi-stage pipelines, and batch processing for ultra-low latency systems.
Lock-Free MPMC Queues: Dual Contention Mastery
Master the complexity of Multi-Producer Multi-Consumer lock-free queues with per-slot sequence numbers, dual CAS coordination, and work-stealing thread pool integration.
Lock-Free MPSC Queues: Production-Grade Implementation
A deep-dive into building production-grade Multi-Producer Single-Consumer lock-free queues in Java, with VarHandle, CAS operations, and real-world benchmarks.
Sharded Processing: Per-Core Isolation for Zero Contention
Eliminate contention entirely with per-CPU-core sharded buffers, thread affinity, and isolated processing lanes for maximum parallelism.
Wait-Free Telemetry: Never-Blocking Observability
Build wait-free telemetry buffers that never block producers, with overwrite semantics for high-frequency trading observability that doesn't impact system performance.
Wait-Free SPSC Queues in Java
How to replace synchronized queue handshakes with a wait-free Single-Producer Single-Consumer ring buffer that uses precise memory ordering instead of locks.
Event Pipelines in Java: The LMAX Disruptor Pattern
How to chain SPSC queues into a high-throughput event pipeline, following the LMAX Disruptor pattern for multi-stage processing with sub-microsecond latency.
MPMC Queues in Java: The Final Boss
How to build a dual-CAS Multi-Producer Multi-Consumer ring buffer in Java that scales on both ends without collapsing under lock contention.
Lock-Free MPSC Queues in Java
How to replace locked many-producer queues with a lock-free Multi-Producer Single-Consumer ring buffer coordinated entirely by CAS and sequence numbers.
Off-Heap Algorithms in Java: The Ring Buffer Foundation
From a naive heap-based queue to an off-heap ring buffer with dramatically better throughput, tail latency, and GC behavior for high-frequency trading workloads.